Reference Number:
1

Job Description:
Requirements:
1. BS Degree in Engineering Discipline - Electrical Engineering preferred
2. 10 + years experience with the last 4 or more performing ASIC Verification OR FPGA Verification Engineering.
3. Must have proven experience and be able to write SystemVerilog code.
4. This position requires US Citizenship due to the nature of the work

Experience Level:
5+ Years

Requirements:

Location:
Pittsburgh PA

Duration:
6 - 9 months

Pay Rate: