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Santa Clara, California - USD Full Time Posted: Tuesday, 13 August 2019
 
 
Description Responsibilities
  • Participate in chip level architecture definition, including analog interface/control, image data processing, power, performance, and area trade-offs.
  • Work with Back End team closely in floor planning, timing closure, and DFT.
  • Full-chip integration and verification.
  • Chip bring-up, validation, and debugging.
Qualifications

  • Minimum MSEE, or equivalent, plus 5 years of experience OR BSEE, or equivalent, plus 7 years of digital design experience
  • Extensive knowledge of all aspects of chip development: from design specification, architecture definition, low-power design, tape-out, chip validation, chip debugging, mass production, to customer support.
  • In depth hands-on experience in ASIC design flow: RTL coding, simulation, synthesis, static timing analysis, formality verification, DFT.
  • Extensive knowledge of peripheral interface: MIPI, USB, I2C, SPI.
  • Experience in design verification and modeling using SystemVerilog, SystemC, Python, and Perl.
  • Extensive knowledge of SOC.
  • Extensive knowledge of CMOS Image Sensor and image signal processing (ISP).


Santa Clara, California, United States of America
Engineering
USD
OmniVision Technologies Inc
OmniVision Technologies Inc
JS2365_C444AFC931670F2F0CAF49B5DC2FC659/744918549
8/13/2019 6:49:44 PM

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